Seconding the recommendation to check the linked supplementary materials if you’re curious. It’s not perfect but I definitely got a solid idea of how it all works just from the info contained in that PDF.
It’s a clever design that reminds me a lot of the work done on optical computing designed for acceleration of inference after you have a trained model. The same sort of “what if we didn’t base it all on transistors and logic gates” type of thinking seems to be in play.
My biggest concerns about the practical results from this are limits related to the random cross connections needed for the design to be scaled up to larger sizes on actual chips. The analog aspects of the design probably give them some more wiggle room than purely digital logic designs but I just can’t shake the feeling that the need for a network of lots of randomly interconnected small units will not fabricate well beyond a certain size due to lithography limitations regarding number of layers you can practically create on a chip and the necessary number of traces/paths on the chip as the network size increases. This of course might be covered in. The actual paper but I’m not paying for it just to comment on randomly interesting Internet forum threads.
I would really like to understand precisely what they mean by neuron-like computing.
edit: there's a good amount of detail in the publicly available supplementary materials https://www.science.org/doi/suppl/10.1126/science.abj7943/su...