That really is the worst possible DMA engine. Given how those tiny cortex M0s rely on DMA to get pretty much everything done, it is confusing why atmel put a basically useless DMA engine in place.
Those chips generally have on-board RAM, so accessing it 14 times isn't much of a big deal. This DMA engine can be fed very quickly (in core clock cycles) if you are doing several DMA transfers at a time: write out all the descriptors to RAM and then just go one pointer at a time.