If you look at this the opposite way round, then you discover why the Apple II and Sinclair ZX Spectrum had such a bonkers screen layout.
The 4116 DRAM chips were arranged as a 128x128 grid with seven-bit row and column addresses. By scattering the RAM like that, different "pages" could be hit by the screen updates, solving the problem of refreshing the DRAM. If you read them sequentially, the RAM would have decayed by the time you got to the bottom of the screen.
The 4116 DRAM chips were arranged as a 128x128 grid with seven-bit row and column addresses. By scattering the RAM like that, different "pages" could be hit by the screen updates, solving the problem of refreshing the DRAM. If you read them sequentially, the RAM would have decayed by the time you got to the bottom of the screen.