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AMD says "256-bit LPDDR5x"

It might be technically correct to call it 8 channels of LPDDR5 but 256-bits would only be 4 channels of DDR5.



DDR5 uses 32bit channels as well. A DDR5 DIMM holds two channels accessed separately.


Thank you for the correction: I didn't realize each DDR5 transaction was only 32 bits.




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