That has existed for the last four years in the `Zbb` extension which is implemented in the most common RISC-V Linux SoC (JH7110, 2023) and anything more recent implementing RVA22 e.g. the SpacemiT chips. Also the P550 ones such as EIC7700X.
The THead cores from 2019 (C906, C910) that precede the Zbb spec by a couple of years implement their own custom instruction.
The only reasonably common Linux core that doesn't have byte reverse is the 2018 U54, used in the HiFive Unleashed (~500 made) and the Microchip Polarfire Soc and PIC64GX ranges.
The THead cores from 2019 (C906, C910) that precede the Zbb spec by a couple of years implement their own custom instruction.
The only reasonably common Linux core that doesn't have byte reverse is the 2018 U54, used in the HiFive Unleashed (~500 made) and the Microchip Polarfire Soc and PIC64GX ranges.